International Publisher of Science, Technology and Medicine

 
 
Share this
 
 
 
Track Your Manuscript
 
 
 
 
Journal of Electrical Engineering & Electronic Technology
Editorial Board: Stephen Bayne, PhD
 Texas Tech University, USA  view all
ISSN: 2325-9833
Frequency: Quarterly
 
Journal of Electrical Engineering and Electronic Technology is a peer-reviewed scholarly journal and aims to publish the most complete and reliable source of information on the discoveries and current developments in the mode of original articles, review articles, case reports, short communications, etc. in all areas of electrical engineering and electronics and making them available online freely without any restrictions or any other subscriptions to researchers worldwide.
 

Journal of Electrical Engineering and Electronic Technology focuses on the topics include, but are not limited to:

  • Microelectronics
  • Electrical circuits
  • Audio and video technology
  • Wireless sensors
  • Nanoelectronics
  • Signal processing
  • Communication systems
  • Power systems
  • Electromagnetic systems
  • VLSI
 
Review processing is performed by the editorial board members of Journal of Electrical Engineering and Electronic Technology or outside experts; at least two independent reviewers approval followed by editor approval is required for acceptance of any citable manuscript. Authors may submit manuscripts and track their progress through the system, hopefully to publication. Reviewers can download manuscripts and submit their opinions to the editor. Editors can manage the whole submission/review/revise/publish process.
 
Submit manuscript at http://www.scitechnol.com/submission/ or send as an e-mail attachment to the Editorial Office at editor.jeeet@scitechnol.com or editor.jeeet@scitechnol.org
 
Journal of Electrical Engineering and Electronic Technology is organizing & supporting 3rd International Conference and Exhibition on Biosensors & Bioelectronics going to be held on August 11-13, 2014 at San Antonio, USA
 
Current Issue
Editors & Editorial Board Members  
J Electr Eng Electron Technol 2013, 2:1   
  PDF   
Design of Miniaturized Dual Band Microstrip Antenna Loaded With Asymmetric J Slot   Research Article
Abdullah Al Noman Ovi, Mahdy Rahman Chowdhury, Md. Rashedul Alam Zuboraj and Md. Abdul Matin
J Electr Eng Electron Technol 2013, 2:1    doi: 10.4172/2325-9833.1000105
 Preview

Design of Miniaturized Dual Band Microstrip Antenna Loaded With Asymmetric J Slot

In this paper, a novel design of miniaturized dual band microstrip antenna has been proposed with necessary theoretical discussion. The single layer probe feed antenna has only 23 mm × 23 mm patch. The antennas has dual band characteristics for 3G mobile, WLAN, Wi-Fi and various other applications. The bandwidth performance of each small antenna is quite satisfactory in S-band (2 GHz-4 GHz) range. Moreover, high directivity is a primary requirement for modern satellite based communication systems. The directivities of proposed two antennas are above 6 dB (at broadside) at both bands. The frequency ratio and frequency shift of the resonant frequency can be controlled by cutting new slits and changing slit lengths. These all are discussed here from theoretical point of view and simulation based results.

|  Full Text |   PDF   
Reducing Energy Consumption in Wireless Sensor Networks Using Hash Distribution Table   Research Article
Masoud Moradi and Arash Ahmadi
J Electr Eng Electron Technol 2013, 2:1    doi: 10.4172/2325-9833.1000106
 Preview

Reducing Energy Consumption in Wireless Sensor Networks Using Hash Distribution Table

Wireless sensor networks include many small sensor nodes. These nodes have limitations with respect to energy level, bandwidth, processing power, and memory. Because of these limitations, navigation, clustering, reduction of energy consumption, an increase of lifespan are much challenges in navigation through wireless sensor networks. This article presents a dispersed navigation protocol called “Bloom Filter”, which is based on older navigation protocols including Anita Kanavalli. Its aim is to optimize energy consumption of networks. This protocol was simulated using NS_2 and assessed. This study well with inexact and nonhomogeneous input and does not require heavy processing. This scheme uses the number of “sends” to a node instead of that node’s residual energy to determine its eligibility as a receiving node, and these results in drastic energy savings.

|  Full Text |   PDF   
An Alternative Modeling Methodology for Interconnects used in High-Speed CMOS Integrated Circuits   Research Article
Mónico Linares-Aranda, Reydezel Torres-Torres and Oscar González-Díaz
J Electr Eng Electron Technol 2013, 2:1    doi: 10.4172/2325-9833.1000107
 Preview

An Alternative Modeling Methodology for Interconnects used in High-Speed CMOS Integrated Circuits

In this paper, an alternative modeling methodology for on-chip interconnects used in the high-speed Systems on Chip is proposed. The methodology is developed from S-parameter measurements of on-chip microstrip lines, fabricated on a silicon substrate using a 0.35 μm Complementary Metal-Oxide-Semiconductor Technology, in order to determine effective circuit models and frequency dependent parameters used to represent the delay and losses associated with interconnection lines. An equation that allows to analytically determining the optimum number of sections for an RLC distributed equivalent model to accurately represent an interconnection line within specific frequency ranges is derived. The modeling methodology was applied to interconnection lines of several lengths, and up to 35 GHz obtaining good simulationexperiment correlations.

|  Full Text |   PDF