GET THE APP

Scanning probe lithography for single-digit nanodevices

Journal of Nanomaterials & Molecular Nanotechnology.ISSN: 2324-8777

All submissions of the EM system will be redirected to Online Manuscript Submission System. Authors are requested to submit articles directly to Online Manuscript Submission System of respective journal.

Scanning probe lithography for single-digit nanodevices


Ivo W Rangelow and Ing Habil

Technische Universitaet Ilmenau, Germany
: J Nanomater Mol Nanotechnol

Abstract


Scanning Probe Lithography (SPL) based on field-emitted low-energy electrons can be directly used to induce cross-linking or resist scission. Typically, voltages in the range of 30-60eV are applied in order to operate in Fowlere-Nordheim electron field emission regime from the scanning-probe tip. Especially, using a direct development-less operation mode and data splitting in mix-and-match provides writing speeds close to single e-beam lithography techniques. Using active cantilevers, direct patterning on calixarene is demonstrated through the employment of direct, development-free techniques. A combination of three important elements provides scanning-probe-nanolithography unique capabilities with respect to resolution and overlay precision: (1) low-energy electrons emitted from the scanning tip, (2) molecular resist, and (3) principles of active proximity probes technology. The same scanning probe is not only applied for lithography, but also for imaging and probing of the surface before and immediately after scanning probe patterning. They are able to routinely obtain atomic resolution at a low thermal noise floor4-6. The presented scanning probe lithography experiments were carried out with a dedicated SPL-tool operated at ambient conditions. Today, CMOS device feature sizes approach the scale of 10 nm or even less, major challenges are encountered, associated with a change in the fundamental nature of the device from “classical” operation to that limited by quantum mechanical effects. The simplicity, controllability, and reproducibility of these methods are enabling a new perspective to be opened for the easy fabrication of beyond CMOS devices, with the added attraction of not requiring a high capital investment. The technology chain presented here will help facilitate the routine manufacturing of single- electron transistors (SET). Cost-effective fabrication of single-digit nano-devices could be the shortest economic way to get access to diverse single electron devices.

Biography


Email: ivo.rangelow@tu-lmenau.de

Track Your Manuscript

Associations